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Coarse-Grained Reconfigurable Array Architectures
Case studies. Configuration of FPGA's. Run-time configuration, partial configuration, dynamic reconfiguration. Partitioning systems onto a reconfigurable fabric. Synthesis tools. Timing issues. Verification and Test strategies. An introduction to Hardware Description Languages.
The lectures will define the architectural aspects of a VHDL : entity, architecture, process, package, types, operators, libraries, hierarchy, test benches and synthesisable VHDL.